As integrated circuits become more compact and more complicated monolithic integration becomes a necessity. However, many circuit applications require devices with incompatible epitaxial structures making monolithic integration difficult. Generally, methods for integrating these structures result in non-planar surface topography.
Attempts to solve the integration problems have included using non-epitaxial materials to form foreign cap layers during overgrowth. Many of these solutions require additional lithographic steps for removal of the unwanted material, result in non-planar topography, require selective overgrowth, or are device specific.